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h-family ac-dc converters <100 w benign environment 10 - 62 edition 2/96 - ? melcher ag melcher the power partners. 10.3 50 w ac-dc converters h-family single output: series 110h/230h1000 dual output: series 110h/230h2000 triple output: series 110h/230h3000 ? two input voltage ranges suitable for most ac mains ? efficient input filter and built-in surge and transient suppression circuitry ?3 kv rms input to output electric strength test ? outputs individually isolated ? outputs fully protected against overload safety according to iec 950 lga c table of contents ........................................... page description .............................................................. 10 - 62 type survey ............................................................ 10 - 63 safety and installation instructions ......................... 10 - 63 functional description ............................................ 10 - 64 electrical input data ................................................ 10 - 65 electrical output data ............................................. 10 - 66 emc and immunity to input transients ................... 10 - 69 supplementary data ............................................... 10 - 70 description of options ............................................. 10 - 71 immunity to environmental conditions .................... 10 - 75 mechanical data ..................................................... 10 - 76 type key and product marking ............................... 10 - 77 description the h-family of ac-dc converters represents a broad and flexible range of power supplies for use in advanced elec- tronic systems. features include high efficiency, reliability and low output voltage noise. the converter inputs are protected against surges and tran- sients occuring at the source lines. an input over- and undervoltage cut-out circuitry disables the outputs if the in- put voltage is outside the specified range. the modules in- clude an inrush current limitation preventing circuit break- ers and fuses from being damaged at switch-on. all outputs are open- and short-circuit proof and are pro- tected against overvoltages by means of built-in suppressor diodes. the outputs can be inhibited by a logic signal ap- plied to the connector pin 2(i). if the inhibit function is not used pin 2 should be connected with pin 23 to enable the outputs. led indicators display the status of the converter and allow visual monitoring of the system at any time. full input to output, input to case, output to case and output to output isolation is provided. the modules are designed and built according to the international safety standard iec 950 and have been approved by the safety agencies lga (germany) and ul (usa). the ul mark for canada has been officially recognized be regulatory authorities in provinces across canada. the case design allows operation at nominal load up to 50 c in a free air ambient temperature. if forced cooling is provided, the ambient temperature may exceed 50 c but the case temperature should remain below 80 c under all conditions. a temperature sensor generates an inhibit signal which disables the outputs if the case temperature t c exceeds the limit. the outputs are automatically re-enabled when the temperature drops below the limit. various options are available to adapt the converters to in- dividual applications. the modules may either be plugged into 19 inch rack sys- tems according to din 41494, or be chassis mounted. case: aluminium, black finish, self cooling. dimensions: 38.7 111.2 168.5 mm. weight: 770 g
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 63 melcher the power partners. 10.3 type survey options see "descriptions of options" table 1: type survey output 1 output 2 output 3 input voltage range and efficiency 1 option u o nom i o nom u o nom i o nom u o nom i o nom u i min ... u i max h min u i min ... u i max h min v dc a v dc a v dc a 85...132 v ac % 187...255 v ac % 47...63 hz 47...63 hz 5.1 8.0 110h1001-2r 74 230h1001-2r 74 v2, v3 12.0 4.0 110h1301-2r 81 230h1301-2r 81 d1...d8 15.0 3.4 110h1501-2r 83 230h1501-2r 82 24.0 2.0 110h1601-2r 83 230h1601-2r 82 48.0 1.0 110h1901-2r 85 230h1901-2r 85 12.0 2.0 12.0 2.0 110h2320-2 81 230h2320-2 81 15.0 1.7 15.0 1.7 110h2540-2 82 230h2540-2 82 5.1 5.0 12.0 0.7 12.0 0.7 110h3020-2 79 230h3020-2 78 5.1 5.0 15.0 0.6 15.0 0.6 110h3040-2 79 230h3040-2 79 1 efficiency measured at u i nom and i o nom safety and installation instructions safety if the output circuit of an ac-dc converter is operator-ac- cessible according to the iec 950 related safety standards, it shall be an selv circuit (safety extra low voltage circuit, i.e. a circuit, separated from mains by at least basic insula- tion, that is so designed and protected such that under nor- mal and single fault conditions, the voltage between any two conductors and between any conductor and earth does not exceed 60 v dc). in the following section an interpretation is provided of the iec 950 safety standard with respect to the safety status of the output circuit. however, it is the sole responsibility of the installer or user to assure the compliance with the relevant and applicable safety standards: if the ac-dc converter is installed according to the relevant safety regulations its outputs are considered to be selv circuits up to a nominal output voltage of 36 v. for safety reasons, the modules must be wired via the female connector h11 (according to din 41612 see sec- tion "accessories") in order to meet national and interna- tional safety requirements! the connector protective earthing pin is leading. during the production process, all transformers and each of the fully assembled modules are individually tested for electric strength and earth continuity (see "supplementary data"). all electric strength tests are performed as factory tests. installation instruction installation of the power supply must strictly follow the na- tional safety regulations. to observe the safety require- ments according to en 60950/iec 950, the module shall be connected via the female connector type h11 see section "accessories". other installation methods may not meet the safety requirements. the modules do not incorporate any fuse. at least one external fuse, installed in the wiring to the input is essential! see "fuse types". whenever the inhibit function is not required, pin 2 (i) should be connected to pin 23 to enable the output(s). important advice electric strength tests should not be repeated in the field. improper test methods, for example overshooting or oscillating test voltages, voltage slopes exceeding 1 kv/ m s, internal y-capacitors not carefully discharged, etc. can cause severe damage to switching devices and ics. melcher ag will not honour any guarantee/warranty claims resulting from high voltage field tests.
h-family ac-dc converters <100 w benign environment 10 - 64 edition 2/96 - ? melcher ag melcher the power partners. 10.3 table 2: h11 connector pin allocation electrical determination h1000 h2000 h3000 pin ident pin ident pin ident inhibit control input 2 i 2 i 2 i safe data or acfail 5 d or v 5 d or v 5 d or v output voltage (positive) 8 vo1+ 8 8 vo3+ output voltage (negative) 11 vo1C 11 11 vo3C control input + 14 r control input C 17 g output voltage (positive) 14 vo2+ 14 vo2+ output voltage (negative) 17 vo2C 17 vo2C output voltage (positive) 20 vo1+ 20 vo1+ 20 vo1+ output voltage (negative) 23 vo1C 23 vo1C 23 vo1C protective earthing 1 26 26 26 ac input voltage 29 n 29 n 29 n ac input voltage 32 p 32 p 32 p 1 leading pin (pregrounding) degree of protection condition: female connector fitted to the unit ip 40: all units, except those with options d or v incorporating potentiometer adjustment. ip 20: type fitted with options d or v incorporating potentiometer. fig. 1 ac-dc converter block diagram input filter current limitation output 3 main control circuit current limitation output 2 29 11 8 23 5 26 32 17 14 20 2 forward converter approx. 70 khz y 1 1 y y y y vdr 14 17 1 single output modules h1000 (r input) functional description the input voltage is fed via an input filter, an inrush current limiter and a bridge rectifier to the input capacitor. this ca- pacitor sources a single transistor forward converter. each output is powered by a separate secondary winding of the main transformer. the resultant voltages are rectified and their ripples smoothed by a power choke. the control logic senses the main output voltage u o1 and generates, with re- spect to the maximum admissible output currents, the con- trol signal for the primary switching transistor. this signal is fed back via a coupling transformer. the auxiliary outputs u o2 and u o3 are unregulated. each auxiliary output's current is sensed and transferred to the main control circuit using a current transformer. if one of the outputs is driven into current limit, the other outputs will re- duce their output voltages as well because all output cur- rents are controlled by the same control circuit.
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 65 melcher the power partners. 10.3 electrical input data general conditions: C t a = 25 c, unless t c is specified. C connector pins 2 and 23 interconnected, r input not connected. table 3: input data input 110h 230h characteristics conditions min typ max min typ max unit u i input voltage range i o = 0 i o nom 85 132 187 255 v ac u i nom nominal input voltage t c min t c max 110 230 i i input current u i nom , i o nom 1 0.78 0.44 a rms s i 0 no-load apparent input power: u i nom single output i o1,2,3 = 0 1 1.5 1 1.5 va double output 7 9 7 9 triple output 7 9 7 9 s i inh idle apparent input power inhibit mode 2.5 2.5 i inr p 3 peak inrush current u i = u i max 80 42 a t inr r rise time r s = 0 w 4 200 300 m s t inr h trailing edge half-life t c = 25 c 1100 1600 r i input resistance t c = 25 c 450 800 m w r ntc 2 ntc resistance 2000 8000 c i input capacitance 250 570 50 270 m f u i abs input voltage limits 0 142 0 284 v ac without any damage 1 with multiple output modules, the same condition for each output applies. 2 initial switch-on cycle. subsequent switch on/off cycles increase the inrush current peak value. 3 i inr p = u i /( r s + r i + r ntc ) 4 r s = source resistance. input under-/overvoltage cut-out if the input voltage remains below 0.6 u i min or exceeds 1.1 u i max (approx. values), an internally generated inhibit signal disables the output(s). when checking this function the absolute maximum input voltage rating u i abs must be carefully considered (see table above). input fuse the modules do not incorporate any fuse. external fuses in- stalled in the wiring to the input are essential. table 4: recommended fuse types (slow-blow) series schurter type part number 110h spt 2.5 a 250 v 0001.2508 230h spt 2.5 a 250 v 0001.2508
h-family ac-dc converters <100 w benign environment 10 - 66 edition 2/96 - ? melcher ag melcher the power partners. 10.3 electrical output data general conditions C t a = 25 c, unless t c is specified. C connector pins 2 and 23 interconnected, r input not connected. table 5a: output data output u o nom 5.1 v 12 v 15 v characteristics conditions min typ max min typ max min typ max unit u o1 output voltage u i nom , i o nom 1 5.00 5.20 11.76 12.24 14.70 15.30 v u o2/3 - 11.10 12.90 13.90 16.10 u o2/3 0 u i min ... u i max - 13.80 17.25 i o2/3 = 0 u o1 l overvoltage prot. failure in 7.5 21 25 u o2/3 l control circuit -2531 i o nom output current u i min ... u i max see table 1 i o l output current t c min ... t c max see fig. 2 limitation response u o1/2/3 output voltage noise u i nom , i o nom 1 50 120 150 mv rms bw = 20 mhz 200 360 450 mv pp d u o1 u static line regulation u i min ... u i nom 20 50 25 120 30 150 mv d u o2/3 u u i nom ... u i max - 80 240 100 300 i o nom 1 d u o1 i static load regulation u i nom 15 50 35 120 45 150 i o = i o nom ...0 2 d u o2/3 i - see fig. 3 see fig. 4 d u o1 ic static cross load u i nom 5 15 10 30 15 45 d u o2/3 ic regulation 3 i o = i o nom ...0 4 - see fig. 3 see fig. 4 table 5b: output data output u o nom 24 v 48 v characteristics conditions min typ max min typ max unit u o1 output voltage u i nom , i o1 nom 23.52 24.48 47.04 48.96 v u o l overvoltage prot. i o1 nom 41 85 i o1 nom output current u i min ... u i max see table 1 u o1 l output current t c min ... t c max see fig. 2 limitation response u o1 output voltage noise u i nom , i o1 nom 240 480 mv rms bw = 20 mhz 720 1440 mv pp d u o1 u static line regulation u i min ... u i nom 30 240 30 480 mv u i nom ... u i max i o1 nom d u o1 i static load regulation u i nom 70 240 150 480 i o1 = i o1 nom ...0 1 with multiple output modules, the same condition for each output applies. 2 condition for specified output. with multiple output modules, other output(s) loaded with constant current i o = i o nom . 3 condition for non-specified output, individually tested, other output(s) loaded with constant current i o = i o nom . 4 multiple output modules.
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 67 melcher the power partners. 10.3 output protection each output is protected against overvoltages which could occur due to a failure of the internal control circuit. voltage suppressor diodes (which under worst case condition may become a short circuit) provide the required protection. the suppressor diodes are not designed to withstand externally applied overvoltages. overload at any of the outputs will cause a shut-down of all outputs. fig. 2 typical output voltage u o versus output currents i o inhibit (i input) the outputs of the module may be enabled or disabled by means of a logic signal (ttl, cmos, etc.) applied to the inhibit input. if the inhibit function is not required, connect the inhibit pin 2 to pin 23 to enable the outputs (active low logic, fail safe). the reference for the inhibit signal is the negative pin of out- put 1. fig. 5 definition of inhibit voltage and current vo i vo+ i inh u inh n p u o2/3 [v] 13 12 11 0 0.25 0.5 0.75 1.0 u o2/3 0 i o2/3 i o2/3 nom i o1 nom 0.5 ? i o1 nom i o1 = 0 a u o2/3 [v] 16 15 14 0 0.25 0.5 0.75 1.0 u o2/3 0 i o2/3 i o2/3 nom i o1 nom 0.5 ? i o1 nom i o1 = 0 a fig. 3 h2320/3020: d u o2/3 (typ.) versus i o2/3 with different i o1 fig. 4 h2540/3040: d u o2/3 (typ.) versus i o2/3 with different i o1 parallel and series connection main outputs of equal nominal voltage can be connected in parallel. it is important to assure that the main output of a multiple output module is forced to supply a minimum cur- rent of 0.1 a to enable correct operation of its own auxiliary outputs. outputs one and two of a dual output unit may be connected parallel without a minimum current requirement at the main output. outputs two and three of a triple output unit can be connected in parallel. in parallel operation, one or more of the outputs may oper- ate continuously in current limit which will cause an in- crease in case temperature. consequently, a reduction of the max. ambient temperature by 10 k is recommended. main or auxiliary outputs can be connected in series with any other output of the same or another module. in series connection, the maximum output current is limited by the lowest current limit. output ripple and regulation values are added. connection wiring should be kept as short as possi- ble. if output terminals are connected together in order to estab- lish multi-voltage configurations, e.g. +5.1 v, 12 v etc. the common ground connecting point should be as close as possible to the connector of the converter to avoid exces- sive output ripple voltages. fig. 6 typical inhibit current i inh versus inhibit voltage u inh 1.6 0.8 0 -0.8 -50 -40 20 40 u inh [v] i inh [ma] -30 0 -20 -10 10 30 50 2.0 1.2 0.4 -0.4 u inh = 0.8 v u o = on u o = off u inh = 2.4 v 1.0 0 0.5 u o 0.5 u o nom i o i o nom 1.0 1.2 i o nom i o1 i o2 , i o3 i ol1 i ol2 , i ol3 0.95
h-family ac-dc converters <100 w benign environment 10 - 68 edition 2/96 - ? melcher ag melcher the power partners. 10.3 0 t t 0 inhibit 1 output 0.1 u o nom t 0 1 u i t r t f output response the reaction of the outputs is similar whether the input volt- age is applied or the inhibit is switched low. an output voltage overshoot will not occur when the module is turned on or off. table 6: inhibit data characteristics conditions min typ max unit u inh inhibit input voltage causing switched on u i min ... u i max C 50 0.8 v dc output voltage being switched off 2.4 50 i inh inhibit current u inh = 0 C60 C100 C220 m a fig. 8 output voltage control by means of the r input fig. 7 output response as a function of input voltage (on/off switching) or inhibit control table 7: output response time type of converter t r at p o = 0 and t f at p o = p o nom t r and t f at p o = 3 / 4 p o nom t r at p o = p o nom unit typ max typ max typ max h1001-2r 3 17 3 17 5 25 ms h1301-2r 5 25 8 30 10 40 h1501-2r 3 17 5 25 15 50 h1601-2r 8 30 15 45 20 70 h1901-2r 35 100 50 150 85 230 h2320-2 10 40 15 50 25 80 h2540-2 8 30 10 40 20 60 h3020-2 30 85 45 130 75 210 h3040-2 20 70 30 90 50 150 programmable voltage (r input) as a standard feature single output modules offer an ad- justable output voltage identified by letter r in the type des- ignation. the control input r (pin 14) accepts either a con- trol voltage u ext or a resistor r ext to adjust the desired out- put voltage. when not connected, the control input auto- matically sets the output voltage to u o nom . the control input is protected against external overvoltage up to 8 v max. a) adjustment by means of an external control voltage u ext between pin 14 (r) and pin 17 (g): the control voltage range is 0...2.75 v and allows an adjustment in the range of approximately u o = 0...110 % u o nom . u o u ext ? CCCCCCC ? 2.5 v u o nom b) adjustment by means of an external resistor: depending upon the value of the required output volt- age, the resistor shall be connected either: between pin 14 and pin 17 ( u o < u o nom ) to achieve an output voltage adjustment range of approx. u o = 0...100% u o nom u o r ext ? 4 k w ? CCCCCCCC u o nom - u o or: between pin 14 and pin 20 ( u o > u o nom ) to achieve an output voltage adjustment range of approximately u o = 100...110 % of u o nom ( u o - 2.5 v) r' ext ? 4 k w ? CCCCCCCCCCCCCCCC 2.5 v? ( u o / u o nom - 1) for output voltages u o > u o nom , the minimum input voltage according to "electrical input data" increases proportionally to u o / u o nom . warning the value of r' ext should never be less than 47 k w to avoid damage to the unit! r inputs may be parallel connected, but 1/r tot = 1/r 1 + 1/r 2 +.... should be considered. conditions: r input not used. for multiple output modules the figures indicated in the table above relate to the output which reacts slowest. all outputs are resistively loaded. variation of the input voltage within u i min ... u i max does not influence the values. 20 32 23 29 r vo1+ vo1C g + u ext 20 14 32 23 r vo1+ vo1C g r ext r' ext 17 17 14 C 4 k w 2.5 v 29 control circuit 4 k w 2.5 v control circuit vi+ vie vi+ vie
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 69 melcher the power partners. 10.3 table 8b: r' ext for u o > u o nom (conditions: u i nom , i o nom , rounded up to resistor values e 96); r ext = ? u o nom = 5.1 v u o nom = 12 v u o nom = 15 v u o nom = 24 v u o nom = 48 v u o [v] r' ext [k w ] u o [v] r' ext [k w ] u o [v] r' ext [k w ] u o [v] r' ext [k w ] u o [v] r' ext [k w] 5.15 464 12.1 1780 15.2 1470 24.25 3160 48.5 6810 5.20 215 12.2 909 15.4 750 24.50 1620 49.0 3480 5.25 147 12.3 619 15.6 511 24.75 1100 49.5 2370 5.30 110 12.4 464 15.8 383 25.00 825 50.0 1780 5.35 90.9 12.5 383 16.0 332 25.25 715 50.5 1470 5.40 78.7 12.6 316 16.2 274 25.50 590 51.0 1270 5.45 68.1 12.7 274 16.4 237 25.75 511 51.5 1100 5.50 61.9 12.8 249 16.5 226 26.00 453 52.0 953 13.0 200 26.25 402 52.5 845 13.2 169 26.40 383 52.8 806 table 8a: r ext for u o < u o nom (conditions: u i nom , i o nom , rounded up to resistor values e 96); r' ext = ? u o nom = 5.1 v u o nom = 12 v u o nom = 15 v u o nom = 24 v u o nom = 48 v u o [v] r ext [k w ] u o [v] r ext [k w ] u o [v] r ext [k w ] u o [v] r ext [k w ] u o [v] r ext [k w] 0.5 0.432 2.0 0.806 2.0 0.619 4.0 0.806 8.0 0.806 1.0 0.976 3.0 1.33 4.0 1.47 6.0 1.33 12.0 1.33 1.5 1.65 4.0 2.0 6.0 2.67 8.0 2.0 16.0 2.0 2.0 2.61 5.0 2.87 8.0 4.53 10.0 2.87 20.0 2.87 2.5 3.83 6.0 4.02 9.0 6.04 12.0 4.02 24.0 4.02 3.0 5.76 7.0 5.62 10.0 8.06 14.0 5.62 28.0 5.62 3.5 8.66 8.0 8.06 11.0 11.0 16.0 8.06 32.0 8.06 4.0 14.7 9.0 12.1 12.0 16.2 18.0 12.1 36.0 12.1 4.5 30.1 10.0 20.0 13.0 26.1 20.0 20.0 40.0 20.0 5.0 200.0 11.0 44.2 14.0 56.2 22.0 44.2 44.0 44.2 phenomenon standard level value applied waveform source impedance test procedure in operation performance electromagnetic immunity table 9: immunity type tests electrostatic iec 801-2 2 contact discharge 4000 v p 1/50 ns 330 w 10 positive and yes 2 discharge (1991-04) to case, 10 negative electric field iec 801-3 2 antenna in 3 v/m sine wave mo- 261000 mhz yes 2 (1984) 1m distance dulated w. 1 khz fast transient/ iec 801-4 1 i/c, +i/Ci 500 v p bursts of 5/50 ns 50 w 1 min positive yes 2 burst (1988) 5 khz rep. rate 1 min negative transients with bursts per 15 ms burst coupling mode duration and a 300 ms period transient iec 801-5 1 i/c 500 v p 1.2/50 m s 12 w 5 pos. and 5 neg. yes 1 (draft 1993-01) +i/Ci 500 v p 2 w impulses per coupling mode 1 normal operation, no deviation from specifications 2 normal operation, temporary deviation from specs possible 3 i = input, o = output, c = case coupling mode 3 typically occur in most installations. the h-family has been successfully tested to the following specifications: emc and immunity to input transients a metal oxide vdr together with an input filter form an ef- fective protection against input transient voltages which
h-family ac-dc converters <100 w benign environment 10 - 70 edition 2/96 - ? melcher ag melcher the power partners. 10.3 electromagnetic emissions table 10: emissions at u i nom and i o nom series standard en 55011, 1991 1 en 55022, 1987 2 30 mhz 3 30 mhz 110h 0.95?.98 u o1 adj u i max u i ov u i min u i uv u i u i abs ok i u o1 > 0.95?.98 u o1 adj i o nom i ol i o ok i o l u o1 < 0.95?.98 u o1 adj t c i t c max t ptc threshold u i inh i +50 v +0.8 v +2.4 v -50 v u inh threshold led off led on led status undefined fig. 9 leds "ok" and "i" status versus input voltage conditions: i o i o nom , t c t c max , u inh 0.8 v u i uv = undervoltage lock-out, u i ov = overvoltage lock-out led "ok" status versus output current conditions: u i min ... u i max , t c t c max , u inh 0.8 v led "i" versus case temperature conditions: u i min ... u i max , i o i o nom , u inh 0.8 v led "i" versus u inh conditions: u i min ... u i max , i o i o nom , t c t c max supplementary data important advice testing by applying ac voltages will result in high and dangerous leakage currents through the y-capacitors (see fig. 1). melcher will not honour any guarantee/war- ranty claims resulting from high voltage field tests. ref- erence is also made to chapter: "safety and installation instructions". isolation input to output electric strength tests, in accordance with the safety standards iec 950, en 60950, vde 0805 and en 41003 are performed as factory tests and should not be repeated in the field. 1 identical with cispr 11 (1990-09) and vde 0875 part 11 (1992-07) 2 identical with cispr 22 (1985) and fcc part 15, vde 0878 part 3 (1989-11)
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 71 melcher the power partners. 10.3 description of options table 12: survey of options option function of option characteristic d 1 input and/or output undervoltage monitoring circuitry safe data signal output (d1...d8) v 1 2 input and output undervoltage monitoring circuitry acfail signal according to vme specifications ( v2, v3) 1 option d excludes option v and vice versa 2 only available with main output voltage u o1 = 5.1 v table 13: undervoltage monitor functions output type monitoring minimum adjustment range typical hysteresis u h [% of u t ] jfet npn u i u o1 of threshold level u t for u t min ... u t max u ti u to u hi u ho d1 d5 no yes C 3.5 v...48 v 1 C 2.3...1 d2 d6 yes no u i min ... u i max 1C 3.0...0.5 C d3 d7 yes yes u i min ... u i max 1 0.95...0.98 u o1 2 3.0...0.5 "0" d4 d8 no yes C 0.95...0.98 u o1 2 C "0" 1 threshold level adjustable by potentiometer (not recommended for mobile applications) 2 fixed value between 95% and 98% of u o1 (tracking) jfet output (d1d4): connector pin d is internally connected via the drain- source path of a jfet (self-conducting type) to the nega- tive potential of output 1. u d 0.4 v (logic low) corresponds to a monitored voltage level ( u i and/or u o1 ) < u t . the cur- rent i d through the jfet should not exceed 2.5 ma. the jfet is protected by a 0.5 w zener diode of 8.2 v against external overvoltages. u i , u o1 status d output, u d u i or u o1 < u t low, l, u d 0.4 v at i d = 2.5 ma u i and u o1 > u t + u h high, h, i d 25 m a at u d = 5.25 v 5 23 20 vo1+ vo1 d u d 6 v i d 29 32 r p n p fig. 10 options d1...d4, jfet output npn output (d5...d8): connector pin d is internally connected via the collector- emitter path of a npn transistor to the negative potential of output 1. u d < 0.4 v (logic low) corresponds to a monitored voltage level ( u i and/or u o1 ) > u t + u h . the current i d through the open collector should not exceed 20 ma. the npn output is not protected against external overvoltages. u d should not exceed 40 v. u i , u o1 status d output, u d u i or u o1 < u t high, h, i d 25 m a at u d = 40 v u i and u o1 > u t + u h low, l, u d 0.4 v at i d = 20 ma 20 23 5 vo1+ vo1 d u d i d 29 32 r p n p fig. 11 options d5...d8, npn output option d undervoltage monitor the input and/or output undervoltage monitoring circuit op- erates independently of the built-in input undervoltage lock- out circuit. a logic "low" (jfet output) or "high" signal (npn output) is generated at pin 5 as soon as one of the moni- tored voltages drops below the preselected threshold level u t . the return for this signal is vo1C (pin 23). the d output recovers when the monitored voltage(s) exceed(s) u t + u h . the threshold level u t is either adjustable by a potentio- meter, accessible through a hole in the front cover, or is fac- tory adjusted to a fixed value specified by the customer. option d exists in various versions d1...d8 as shown in the following table.
h-family ac-dc converters <100 w benign environment 10 - 72 edition 2/96 - ? melcher ag melcher the power partners. 10.3 0 1 0.95 0 u i [v dc] 0 t t t t low min 4 t low min 4 t high min t h 1 u ti + u hi u ti input voltage failure switch-on cycle input voltage sag switch-on cycle and subsequent input voltage failure u d high u d low u d 0 jfet npn t u o1 u o1 nom u d high u d low u d t low min 4 t h 1 0 0 u d high u d low u d 0 jfet npn u o1 u d high u d low u d t low min 4 u to output voltage failure 0 i d high i d low i d t 0 i d high i d low i d t t t t 2 33 33 u o1 nom u to + u ho input voltage monitoring output voltage monitoring threshold tolerances and hysteresis: if u i is monitored, the internal input voltage after the input filter and rectifier is measured. consequently this voltage differs from the voltage at the connector pins by the voltage drop d u ti across the input filter. the value of d u ti depends upon the input voltage range, threshold level u t , tempera- ture and input current. the input current is a function of the input voltage and the output power. fig. 13 relationship between u i , u o1 , u d , i d and u o1 /u o nom versus time. 1 with output voltage monitoring the hold-up time t h = 0 2 the d signal remains high if the d output is connected to an external source. 3 t low min = 40...200 ms, typically 80 ms d u ti u hi u d low u d u d high u i p o = p o nom p o = 0 p o = 0 u ti p o = p o nom fig. 12 definition of u ti , d u ti and u hi (jfet output)
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 73 melcher the power partners. 10.3 formula for threshold level for desired value of t h : 2 ? p o ? ( t h + 0.3 ms) ? 100 u ti = CCCCCCCCCCCCCCCCCCCCC + u i min 2 c i min ? h where as: c i min = minimum internal input capacitance [mf], accord- ing to table below p o = output power [w] h = efficiency [%] t h = hold-up time [ms] u i min = minimum input voltage [v] u ti = threshold level [v] remarks: the threshold level u ti of option v2 and v3 is adjusted dur- ing manufacture to a value according to table "undervol- tage monitor functions", section "option d"). a decoupling diode should be connected in series with the input to avoid the input capacitance discharging through other loads connected to the same source voltage. option v acfail signal (vme) this option defines an undervoltage monitoring circuit for the input or the input and main output voltage ( u o1 nom = 5.1 v only) equivalent to option d and generates the acfail signal (v signal) which conforms to the vme standard. the low state level of the acfail signal is speci- fied at a sink current of i v = 48 ma to u v 0.6 v (open-col- lector output of a npn transistor). the pull-up resistor feed- ing the open-collector output should be placed on the vme backplane. after the acfail signal has gone low, the vme standard requires a hold-up time t h of at least 4 ms before the 5.1 v output drops to 4.875 v when the 5.1 v output is fully loaded. this hold-up time t h is provided by the internal input capacitance. consequently the working input voltage and the threshold level u ti should be adequately above the mini- mum input voltage u i min of the converter so that enough energy is remaining in the input capacitance. table 15: undervoltage monitor functions v output monitoring minimum adjustment range typical hysteresis u h [ % of u t ] (vme compatible) u i u o1 of threshold level u t for u t min ... u t max u ti u to u hi u ho v2 yes no u i min ... u i max 1C 3.0...0.5 - v3 yes yes u i min ... u i max 1 0.95...0.98 u o1 2 3.0...0.5 "0" 1 threshold level adjustable by potentiometer (not recommended for mobile applications) 2 fixed value between 95% and 98% of u o1 (tracking), output undervoltage monitoring is not a requirement of vme standard v output (v2, v3): connector pin v is internally connected to the open collec- tor of a npn transistor. the emitter is connected to the negative potential of output 1. u v 0.6 v (logic low) corre- sponds to a monitored voltage level ( u i and/or u o1 ) < u t . the current i v through the open collector should not exceed 50 ma. the npn output is not protected against external overvoltages. u v should not exceed 80 v. u i , u o1 status v output, u v u i or u o1 < u t low, l, u v 0.6 v at i v = 50 ma u i and u o1 > u t + u h high, h, i v 25 m a at u v = 5.1 v 20 23 5 vo1+ vo1 v u v i v n 29 32 r p p fig. 14 output configuration of options v2 and v3 voltage(s) exceed(s) u t + u h . the threshold level u t is ad- justable by a potentiometer accessible through a hole in the front cover. versions v2 and v3 are available as shown below. option v operates independently of the built-in input under- voltage lock-out circuit. a logic "low" signal is generated at pin 5 as soon as one of the monitored voltages drops below the preselected threshold level u t . the return for this signal is vo1C (pin 23). the v output recovers when the monitored table 14: factory potentiometer setting of u ti types 110h 230h unit c i min 0.25 0.05 mf u ti 94 200 v dc t h 55ms
h-family ac-dc converters <100 w benign environment 10 - 74 edition 2/96 - ? melcher ag melcher the power partners. 10.3 3 5.1 v 4.875 v 0 u i [v dc] 0 t t u ti + u hi u ti input voltage failure switch-on cycle input voltage sag switch-on cycle and subsequent input voltage failure u v high u v low u v 0 v2 t u o1 0 u v high u v low u v 0 v2 u i u ti 4 output voltage failure 0 u v high u v low u v 3 u ti + u hi t low min 2 t low min 2 t low min 2 3 3 4 4 u v high u v low u v 0 v3 t 3 t low min 2 t low min 2 3 3 t h 1 2.0 v t h 1 4 3 4 t low min 2 v3 5.1 v 4.875 v 0 u o1 2.0 v input voltage monitoring output voltage monitoring threshold tolerances and hysteresis: if u i is monitored, the internal input voltage is measured af- ter the input filter and rectifier. consequently this voltage differs from the voltage at the connector pins by the voltage drop d u ti across input filter and rectifier. the value of d u ti depends upon the input voltage range, threshold level u t , temperature and input current. the input current is a func- tion of input voltage and output power. fig. 16 relationship between u i , u o1 , u v , i v and u o1 /u o nom versus time. 1 vme request: minimum 4 ms 2 t low min = 40...200 ms, typically 80 ms 3 u v level not defined at u o1 < 2.0 v 4 the v signal drops simultaneously with the output voltage, if the pull-up resistor r p is connected to vo1+. the v signal remains high if r p is connected to an external source. d u ti u hi u v low u v u v high u i p o = p o nom p o = 0 p o = 0 u ti p o = p o nom fig. 15 definition of u ti , d u ti and u hi
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 75 melcher the power partners. 10.3 immunity to environmental conditions table 16: mechanical stress test method standard test conditions ca damp heat din 40046 part 5 temperature: 40 2 c steady state iec 68-2-3 relative humidity: 93 +2/-3 % duration: 21 days unit not operating ea shock din 40046 part 7 acceleration amplitude: 15 g n = 147 m/s 2 (half-sinusoidal) iec 68-2-27 bump duration: 11 ms mil-std-810d section 516.3 number of bumps: 18 (3 each direction) unit operating eb continuous shock din 40046 part 26 acceleration amplitude: 10 g n = 98 m/s 2 (half-sinusoidal) iec 68-2-29 bump duration: 16 ms mil-std-810d section 516.3 number of bumps: 6000 (1000 each direction) unit operating fc vibration din 40046 part 8 frequency (1 oct/min): 10...150 hz (sinusoidal) iec 68-2-6 acceleration amplitude: 2 g n = 20 m/s 2 mil-std-810d section 514.3 test duration: 3.75 h (1.25 h each axis) unit operating thermal considerations table 17: temperature specifications, values given are for an air pressure of 800...1200 hpa (800...1200 mbar) characteristic min max unit t a standard operational ambient temperature range -2 -10 50 c t c standard operational case temperature range -2, overtemp. lock-out (ptc) above t c max -10 80 t s storage temperature range -2 C25 100 basically the available output power is limited by thermal characteristics. operation at higher temperatures with nominal output currents is also possible if forced cooling can be provided (heat sink, fan, etc.). example: sufficient forced cooling allows t a max = 65 c. a simple check of the case temperature t c ( t c 80 c) at full load ensures correct operation of the system (temperature measurement point on the case see "mechanical data"). in general: for an ambient temperature of 65 c with only convection cooling, the maximum permissible current for each output is approx. 50% of it's nominal value. 0 10 20 30 40 50 60 70 80 40 50 60 70 80 i o nom [%] t a [ c] 90 100 110 t c max i o nom each output (convection cooling) i o nom (forced cooling) t a min fig. 17 output derating versus ambient temperature under con- vection and forced cooling conditions table 18: mtbf values at specified module types ground benign unit case temperature 40 c mtbf h1000 384'000 h h2000 306'000 h3000 270'000
h-family ac-dc converters <100 w benign environment 10 - 76 edition 2/96 - ? melcher ag melcher the power partners. 10.3 mechanical data dimensions in mm. tolerances 0.3 mm unless otherwise indicated. fig. 18 case h02, weight 770 g (approx.) 111.2 0.8 88 (11.6) 168.5 0.5 127 171.9 (din 41494) 20 100 0.6 1.6 6te 2 5 8 11 14 17 20 23 26 29 32 male connector h 11 according to din 41 612 38.7 95 0.5 measurement point for case temperature t c m 3; depth = 4 mm (chassis mount) 22 68 159.4 mounting plane of connector h11 25.40 30.48 2te 7.09 17.25 mounting holes for retaining clips v 12.17 103 3.27 20.5 12.1 0.5 94.5 0.1 0 31.5 0.1 0 ?3.5 ?4.0 ok (led green) inhibit i (led red) potentiometer (option d or v) front plate main face rear face back plate european projection
benign environment ac-dc converters <100 w h-family edition 2/96 - ? melcher ag 10 - 77 melcher the power partners. 10.3 type key and product marking type key 230 h 2 5 40 -2 r d v input voltage range u i : 85...132 v ac ........... 110 187...255 v ac ........... 230 family ............................................................................. h number of outputs ...................................................... 1...3 output 1, u o1 nom : 5.1 v ............... 0 12 v ............... 3 15 v ............... 5 24 v ............... 6 48 v ............... 9 single output modules ............. 01 output 2 and 3, u o2 nom , u o3 nom : 12 v ............. 20 15 v ............. 40 ambient temperature range t a : -1050 c .............. -2 (operational) output voltage control input (single output modules only) r options: save data signal (d1...d8, to be specified) ..................... d 1 acfail signal (v2, v3, to be specified) ........................... v 1 1 option d excludes option v and vice versa example: 230h1501-2rd3: ac-dc converter, input voltage range 187...255 v ac, providing output with 15 v/3.4 a; equipped with an output voltage control input and undervoltage monitoring. accessories: front panels, female connectors, mounting facilities, etc. please refer to section "accessories". product marking (refer also to "mechanical data") main face: basic type designation, applicable safety approval and recognition marks, warnings, pin allocation, melcher patents and company logo. front plate: identification of leds and potentiometer. back plate: specific type designation, input voltage range, nominal output voltage(s) and current(s), pin allocation of op- tions and auxiliary functions, external fuse specification and degree of protection. rear face: label with batch no., serial no. and data code comprising production site, modification status of the main pcb, date of production. confirmation of successfully passed final test.

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